Leakage Power Reduction in Read and Write Enhanced Macro Memory Circuit Design Using Transistor Stacking and Reversible Approach. Adv Syst Sci Appl [Internet]. 2022 Apr. 20 [cited 2025 Apr. 3];22(1):130-47. Available from: https://ijassa.ipu.ru/index.php/ijassa/article/view/1177