SANAPALA, Kishore; SAKTHIVEL, R. Design of Full Adder Using Subthreshold DTPT Logic. Advances in Systems Science and Applications, [S. l.], v. 16, n. 1, p. 85–94, 2016. Disponível em: https://ijassa.ipu.ru/index.php/ijassa/article/view/359. Acesso em: 4 dec. 2024.