Reconfigurable Architecture for Image Feature Detection

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Saroja devi Hande Rajesh Nandalike

Abstract

Hardware  based developments are useful for variety of image based applications such as highly challenging video surveillance.  FPGA comprises of combination of the hardware attributes of an ASIC, supporting reconfigurability, reduced time-to-market and real time performance. Hardware based feature detection is a promising solution that exploits inherent parallelism in algorithms to accomplish significant improvement in speed. The efficient usage of resources still remains a challenge that specifically determines the cost of hardware, which can be addressed using our approach. In this paper, we have presented the hardware architecture for feature detection part of the Scale Invariant Feature Transform (SIFT) algorithm for frames from an HD-720p video. The proposed architecture is designed using Xilinx System Generator (SysGen) tool and implemented on Genesys2 Kintex-7 FPGA Development Board.

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How to Cite
HANDE, Saroja devi; NANDALIKE, Rajesh. Reconfigurable Architecture for Image Feature Detection. Advances in Systems Science and Applications, [S.l.], v. 17, n. 2, p. 43-51, sep. 2017. ISSN 1078-6236. Available at: <http://ijassa.ipu.ru/ojs/ijassa/article/view/258>. Date accessed: 18 dec. 2017.
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